This work investigates, for the first time,
how the PN passivation introduced in the FDSOI
substrate just below the BOX to improve substrate
performance in 28 nm FD-SOI technology affects
active MOSFET parameters. DC performance and
low-frequency noise (LFN) of MOSFETs are
studied for different substrate resistivities and
implant parameters. It is demonstrated that PN
passivation impacts the device performance via
modification of the back-gate realization.
Vanbrabant, M., Rack, M., Cathelin, A., Raskin, J.-P., & Kilchytska, V. (2025, May). Effect of PN Passivation on MOSFETs Performance in 28 nm FD-SOI. EuroSOI-ULIS, Warsaw. https://hdl.handle.net/2078.5/280663