(en) This work provides a deep assessment of RF technique for self-heating (SH) extraction in advanced FD-SOI MOSFETs focusing on the uncertainties introduced by the extraction procedure. Particularly, we investigate the impact of i) choice of thermal resistance, Rth formula and ii) extraction of drain current variation with temperature, gt = dID/dT. We show that the two valid output conductance gds-based formulations for thermal resistance, when applied to experimental data, exhibit discrepancies that increase at higher gate voltages and shorter gate lengths. Extracted uncertainty ranges from ~3% for 100 nm device to ~22% for the shortest lengths, underlining the importance of both consistent formulation and accurate gt extraction at aggressively scaled nodes. Introduction and Method: Enhanced self-heating in FD-SOI MOSFETs, w.r.t. their bulk counterparts, originates from the buried oxide (BOX) enhanced thermal isolation, and the higher power densities at advanced technology nodes [1]. The RF technique proved its advantages for SH extraction in advanced devices [1]. It extracts Rth from gds difference at high and low frequency: gds,sh-gds,iso, combined with gt computation (Figure 1) [2]. Depending on whether gt is taken from ID vs Tamb or Tch, four Rth formula can exist (Figure 2(a)). We show that only two of the proposed formula, Rth,F1 and Rth,F2, originally derived in [2], are mathematically correct. Confusion in the definition of gt or gds may lead to using incorrect forms Rth,F1p and Rth,F2p, as mentioned for Rth,F1p in [3]. In this work, we combine experimental results with analytical modeling to validate the correctness of Rth,F1 and Rth,F2, and to quantify the relative uncertainty in Rth arising from gt extraction and formula selection. Results and Discussion: DC and RF S-parameters measurements were carried out on 28FD-SOI nMOSFETs with gate lengths L from 30 to 100 nm, Tamb from 298 to 353 K, and VDS = 1 V. The characterized devices are considered representative of the typical 28FD-SOI device behavior. The validity of the Rth formulas is evaluated in Figure 2(b) using a simple transistor model with a user-specified Rth user. As shown, only Rth,F1 and Rth,F2 correctly recover Rth user , whereas the alternative Rth,F1p and Rth,F2p formulas introduce errors of up to 7%. Figure 2(c) illustrates RthW values extracted using four formulas for experimental 40 nm-long device, together with error bars reflecting the gt uncertainty (given by assumption of linear ID(T) dependence). From the experimental data, even if Rth,F1 and Rth,F2 do not coincide exactly, they remain the closest pair. The observed separation between Rth,F1 and Rth,F2 exceeds the uncertainty associated with gt extraction, showing that gt uncertainty: σgt alone cannot explain the deviation. We therefore examine how this deviation (Rth,F1-Rth,F2) evolves with L and VGS, to gain further insight into its physical origin. We define Rth,mean = (Rth,F1+Rth,F2)/2, and use σformula = |Rth,F1-Rth,F2|/2 as a measure of uncertainty due to formula choice. As shown in Figure 3(a), σgt rises sharply near VZTC ≈ 0.65 V, where gt → 0, while σformula increases with VGS. Figure 3(b) shows that both contributions grow as the channel length decreases, with σtot increasing from ~3.5% at L = 100 nm to ~11% for the shortest device, where σgt and σformula become comparable. The increase of σformula with higher VGS and shorter L strongly suggests that enhanced self-heating amplifies the discrepancy between Rth,F1 and Rth,F2. A plausible explanation is that Rth is temperature-dependent [2], an effect that was not included in the model. Finally, Figure 3(c) shows that using an incorrect formula (i.e. Rth,F1p or Rth,F2p) significantly increases the relative uncertainty, reaching up to 20% for the shortest gate lengths 30-40 nm). Conclusion: This work analyzed various uncertainty sources in Rth extraction using the RF method. We analytically confirmed that Rth,F1 and Rth,F2 are the only mathematically correct gds-based formulations, while Rth,F1p and Rth,F2p introduce a systematic error. A residual Rth,F1-Rth,F2 discrepancy is observed in measurements, increasing with both VGS and L-1 , while the uncertainty in gt extraction also grows with L-1. Notably, σformula dominates over σgt for most geometries, except at L = 30 nm where both contributions become comparable underlining the need for both consistent formula selection and accurate gt extraction at the shortest nodes. Further studies, including temperature-dependent Rth characterization, are needed to fully clarify the origin of experimentally observed differences between Rth,F1 and Rth,F2. This room-temperature analysis is only a first step toward a more complete temperature-dependent study, as those uncertainties are expected to exacerbate at cryogenic temperatures, where Tamb and Tch differ much more strongly.
Vandermolen, E., Vanbrabant, M., Dieuzeide, V., Philippe Galy, Raskin, J.-P., & Kilchytska, V. (2026, May 21). Analysis of uncertainties in the Self-Heating Extraction by RF technique in FD-SOI Transistors. EuroSOI-ULIS 2026, Grenada, Spain. https://hdl.handle.net/2078.5/280590