Radiation Degradation and Mitigation of an Ultrathin SOI SPAD Using a Perimeter Gate
(2025) IEEE Transactions on Electron Devices — Vol. 72, n° 4, p. 1844-1850 (2025)
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- Authors
Roisin, Nicolas 
- Abstract
- This work investigates the robustness of an ultrathin backside-illuminated (BSI) silicon-on-insulator (SOI) single-photon avalanche diode (SPAD) against gamma-ray irradiation for space applications. Experimental results demonstrate a breakdown voltage shift in the studied SPAD from 10.17 to 9.95 V after a total ionizing dose (TID) of 132 krad(Si). An increase in dark count rate (DCR) from 1490 to 2700 cps/ μ m2 at 1 V excess bias is shown at this dose. TCAD simulations explain the role of the oxide-trapped charges, induced by irradiation in the insulating layer surrounding the active region, on the SPAD performance. These trapped charges shift the peak electric field, leading to premature breakdown while the extension of the active area affected by impact ionization increases the DCR. Further simulations show that implementing a perimeter-gated structure and reducing oxide thickness can effectively mitigate these effects by leveraging capacitive effects, preventing a breakdown voltage shift. The perimeter gate (PG) lowers the simulated DCR after irradiation from 2700 to 1365 cps/ μ m2, thereby enhancing the radiation resilience of ultrathin SOI SPADs beyond a TID of 132 krad(Si).
- Affiliations
Citations
Klauner, T., Roisin, N., Bonfanti, O., Sabri Alirezaei, I., André, N., & Flandre, D. (2025). Radiation Degradation and Mitigation of an Ultrathin SOI SPAD Using a Perimeter Gate. IEEE Transactions on Electron Devices, 72(4), 1844-1850. https://doi.org/10.1109/TED.2025.3543789 (Original work published 2025)