A 0.9-nA Temperature-Independent 565-ppm/°C Self-Biased Current Reference in 22-nm FDSOI

(2022) ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC) — Location: Milan (Italy) (19.September.2022)

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Abstract
Temperature-independent current references operating in the nA range are rarely area-efficient due to the use of large resistors occupying a significant silicon area at this current level. In this paper, we introduce a nA-range constant-with-temperature (CWT) current reference relying on a self-cascode MOSFET (SCM), biased by a proportional-to-absolute-temperature voltage with a CWT offset voltage. The proposed reference has been fabricated in a 22-nm fully-depleted silicon-on-insulator (FDSOI) technology and, as a result of using an SCM, occupies a silicon area of 0.0132 mm² at least 4× smaller than state-of-the-art CWT references operating in the same current range. It consumes 5.8 nW at 0.9 V and achieves a 0.9-nA current with a line sensitivity of 0.39 %/V and a temperature coefficient of 565 ppm/°C.
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Lefebvre, M., Flandre, D., & Bol, D. (2022). A 0.9-nA Temperature-Independent 565-ppm/°C Self-Biased Current Reference in 22-nm FDSOI. Proceedings of the ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), 469-472. https://doi.org/10.1109/ESSCIRC55480.2022.9911369 (Original work published 2022)