Silicon-On-Insulator (SOI) is emerging as a strong technology candidate for low-power high–performance applications. In this work, based on experimental data, we analyze the fundamental aspects of current leakage in deep-submicron SOI CMOS technologies and we discuss the physical mechanisms and their dependence with bias, temperature and operating frequency. Subsequently, we evaluate the merits of parametric testing techniques based on current monitoring (as IDDQ or IDDT testing) when applied to this technology.
Iniguez, B., Raskin, J.-P., Simon, P., Flandre, D., & Segura, J. (2001). Leakage components in fully-depleted SOI CMOS technology: implications on IDDQ testing. 2001 IEEE International Workshop on Defect Based Testing (DBT 2001), Marina del Rey, Los Angeles (USA). https://hdl.handle.net/2078.5/228703