Back-gate bias effect on 3-port UTBB-FDSOI non-linearity performance
(2017) 2017 47th European Solid-State Device Research Conference (ESSDERC 2017) — Location: Leuven (Belgium) (11.September.2017)
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- This work investigates experimentally the non-linearities of FDSOI MOSFETs from DC to RF frequencies. The effect of the back-gate bias on non-linearity of the device is studied by means of 2nd and 3rd harmonic distortions (HD2 and HD3) extracted from dc I-V curves as well as from large-signal RF measurements using 1-dB and IP3 points. It is shown that the non-linearity is reduced by applying a positive back-gate bias. The reasons for this reduction are increasing of “effective body factor” and lesser mobility degradation with increase of the positive back-gate bias.
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Kazemi Esfeh, B., Kilchytska, V., Parvais, B., Planes, N., Haond, M., Flandre, D., & Raskin, J.-P. (2017). Back-gate bias effect on 3-port UTBB-FDSOI non-linearity performance. proceedings of ESSDERC 2017. Published. 2017 47th European Solid-State Device Research Conference (ESSDERC 2017), Leuven (Belgium). https://doi.org/10.1109/ESSDERC.2017.8066613 (Original work published 2017)