Trap Recovery by in-Situ Annealing in Fully-Depleted MOSFET With Active Silicide Resistor
(2021) IEEE Electron Device Letters — Vol. 42, n° 7, p. 1085-1088 (2021)
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- Abstract
- This work reports first original results on the impact of active in-situ electro-thermal recovery, on the electrical and low-frequency noise characteristics of N-type MOS transistor with thick high-k metal gate oxide, from 28 nm Fully Depleted Silicon-On-Insulator (FDSOI) process. In order to recover “typical” device characteristics, four cycles of local thermal annealing up to 590K are applied for 14 ms each, using an active silicide source. Experimental results reveal an important improvement of the “corner” transistor’s I-V behavior allowing the recovery of “typical” device characteristics. An increase of the maximum transconductance by 43% is obtained. In the same time, a typical device stays unaffected by this local annealing. Low-frequency noisemeasurements showa clear reduction of the 1/f noise and Random Telegraph Noise by almost one decade, after the electro-thermal recovery. This can explain the improvement of the electrical characteristics by annealing of defects.
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Citations
Amor, S., Kilchytska, V., Flandre, D., & Galy, P. (2021). Trap Recovery by in-Situ Annealing in Fully-Depleted MOSFET With Active Silicide Resistor. IEEE Electron Device Letters, 42(7), 1085-1088. https://doi.org/10.1109/LED.2021.3079244 (Original work published 2021)