Impact of High Temperature Up to 175 ∘ C on the DC and RF Performances of 22-nm FD-SOI MOSFETs
(2023) IEEE Transactions on Electron Devices — p. 1-6 (2023)
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- Abstract
- In this work, the effect of rise in temperature from 25 ∘ C to 175 ∘ C on the performance of 22-nm fully depleted silicon-on-insulator (FD-SOI) MOSFETs is studied under different bias conditions. The devices are measured in dc and RF to observe the zero-temperature coefficient (ZTC) point and extract the prominent RF figures of merit (FoMs), i.e., current-gain cutoff frequency ( f T ) and maximum oscillation frequency ( f max ). The evolution of transconductance ( g m ) with temperature appears to be one of the major causes of the 20% degradation in peak f T and f max at 175 ∘ C. From a low-power application point of view, stepping down V d from 0.8 to 0.6 V decreases the magnitude of peak f T and f max degradation to around 7%–10%, respectively, over the given temperature range while reducing static power consumption ( P dc ) around 29%. Furthermore, the variation of f T and f max at and below the g m -ZTC is investigated. Below the g m -ZTC point, at a front-gate bias V g of 0.3 V, an improvement in f T of around 20% and an almost steady f max are observed.
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Citations
Halder, A., Nyssens, L., Vanbrabant, M., Rack, M., Lederer, D., Kilchytska, V., & Raskin, J.-P. (2023). Impact of High Temperature Up to 175 ∘ C on the DC and RF Performances of 22-nm FD-SOI MOSFETs. IEEE Transactions on Electron Devices, 1-6. https://doi.org/10.1109/TED.2023.3303150 (Original work published 2023)