Exploring the back-end-of-line impact on self heating in advanced silicon-on-insulator RF MOSFETs
(2024)
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- Authors
- Supervisors
- Raskin, Jean-Pierre
- Abstract
- Understanding and managing the thermal aspects of state-of-the-art MOSFETs has gained importance due to the growing applications in high-temperature environments and higher self-heating effects. In both cases, increased device temperature significantly impacts its performance and reliability; this thesis aims to evaluate these impacts by studying 22 nm FDSOI MOSFETs and their PDK models. The impact of high temperatures up to 175 °C, going beyond the commercial device temperature rating of 125 °C, on MOSFET figures-of-merit is studied. Two prominent self-heating characterization techniques, the RF and the gate-resistance techniques, are investigated. A significant discrepancy is observed in the thermal resistance obtained from these methods on the same test device, prompting a discussion on their underlying assumptions and methodologies. After assessing the self-heating problem, the thesis explores methods to mitigate it. A major contribution of this work is the demonstration of heat evacuation through the back-end-of-line path, which has been ignored in literature. Heat sinks in the back-end-of-line connected to the gate are proposed as a means of reducing thermal resistance. Heat sink efficiency is found to be directly dependent on its area: larger sinks enhance thermal performance but introduce parasitics that degrade RF performance. Overall, this thesis underscores the importance of considering thermal effects in MOSFET design and provides insights into improving characterization techniques and thermal modelling.
- Affiliations
Citations
Halder, A. (2024). Exploring the back-end-of-line impact on self heating in advanced silicon-on-insulator RF MOSFETs. https://hdl.handle.net/2078.5/258432