Advanced interface characterization for RF SiGe engineered substrates and Al2O3 gate dielectric

(2026)

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Advanced_Interface_Characterization_for_RF_SiGe_engineered_Substrates_and_Al2O3_Gate_Dielectric.pdf
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Abstract
(en) This thesis develops advanced interface characterization techniques for two RF/CMOS technologies, using capacitance–voltage (C–V) analysis as the primary tool to evaluate interface trap density (Dit) extraction methods and address admittance-related effects that degrade extraction accuracy. Buried SiGe substrates for RF/mm-wave applications: A novel passivation scheme buries an epitaxial SiGe layer beneath the oxide to preserve substrate high resistivity. Interfacial Ge–O bonds raise Dit, pinning the Fermi level in the band gap and reducing free-carrier concentration, while the buried layer can also induce beneficial tensile strain to enhance mobility in UTBB FDSOI devices. Using Dit, effective resistivity (ρeff), and linearity as figures of merit, the work shows that C–V behavior differs between standard- and high-resistivity silicon—demonstrating that a simple parallel RC network fails at high frequencies—and introduces a new HR Si de-embedding model. RF characterizations of ρeff and linearity are presented as key metrics for controlling substrate loss, coupling, and signal distortion for RF applications. Al2O3/SiO2 dielectric stacks in MOS capacitors: Different fabrication methods are compared via C–V, G–V, and I–V measurements, with reliable extraction of EOT, series resistance, fixed oxide charge density (Qf), and Dit. Strong agreement between the Terman and conductance methods confirms the reliability of the characterization approach. These findings open the door to more accurate substrate engineering and gate stack optimization for next generation RF and CMOS technologies. As a concrete application, an RF power switch built on a buried SiGe HR-SOI substrate with high-κ Al2O3/SiO2 gate stack (EOT ≈ 5 nm) is proposed.
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Yan, Y. (2026). Advanced interface characterization for RF SiGe engineered substrates and Al2O3 gate dielectric. https://hdl.handle.net/2078.5/278796