Noise analysis for the design of side-channel secure cryptographic circuits
(2021)
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- Abstract
- Noise in digital circuits has always been minimized to achieve high signal integrity, robust operation and of course high performance. However, for cryptographic applications, increased noise can in fact be beneficial. It can be used effectively to reduce the SNR and to make it harder for an adversary to extract useful information (secret keys) from the side channel leakage data. A natural question concerns the extent to which intrinsic MOSFET noise is required to improve security. In this manuscript, we explore this question and suggest ways to exploit the physical noise as a building block on which system level noise countermeasures can be further applied. The goal of this dissertation work is to quantify the intrinsic noise inherently present in a system and explore its manifestations through which it may be analyzed in a cryptographic context. This work could aid cryptographic designers in analyzing the intrinsic security of design implementations early in the development cycle, especially during design-stage evaluations. For research and academia, our work can be extended to explore different physical noise sources coupled to obtain a more holistic and consolidated view of the intrinsic security of design implementations.
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Citations
Nawaz, K. (2021). Noise analysis for the design of side-channel secure cryptographic circuits. https://hdl.handle.net/2078.5/107881