Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications
(2006) Microelectronics — Vol. 37, n° 2, p. 137-144 (2006)
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- We present in this work an analysis of the low temperature operation of Graded-Channel fully depleted Silicon-On-Insulator (Sol) nMOSFETs for analog applications, in the range of 100-300 K. This analysis is supported by a comparison between the results obtained by two-dimensional numerical simulations and measurements in the whole temperature range under study. The Graded-Channel transistor presents higher Early voltage if compared to the conventional fully depleted Sol nMOSFET, without degrading the transconductance over drain current, at all studied temperatures, leading to a gain larger than 20 dB compared to the conventional SOL The resulting higher gain lies in the improvement of the electric field distribution and impact ionization rate by the graded-channel structure. (C) 2005 Elsevier Ltd. All rights reserved.
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Pavanello, M., Flandre, D., Der Agopian, P., & Martino, J. (2006). Cryogenic operation of graded-channel silicon-on-insulator nMOSFETs for high performance analog applications. Microelectronics, 37(2), 137-144. https://doi.org/10.1016/j.mejo.2005.04.046 (Original work published 2006)