A VLSI system for neural Bayesian and LVQ classification

Thissen, P.;Legat, Jean-Didier;Verleysen, Michel;Madrenas, J.;Dominguez, J
(1995) International Workshop on Artificial Neural Networks — Location: MALAGA-TORREMOLINOS(Spain) (7.June.1995)

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Authors
  • Thissen, P.
    Author
  • Legat, Jean-Didierorcid-logoUCLouvain
    Author
  • Verleysen, MichelUCLouvain
    Author
  • Madrenas, J.
    Author
  • Dominguez, J
    Author
Abstract
Various types of neural networks ma! be used in multi-dimensional classification tasks; among them, Bayesian and LVQ algorithms are interesting respectively for their performances and their simplicity of operations, The large number of operations involved in such algorithms may however be incompatible with on-line applications or with the necessity of portable small size systems. This paper describes a neural network classifier system based on a fully analog operative chip coupled with a digital control system, The chip implements sub-optimal Bayesian classifier and LVQ algorithms.
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Thissen, P., Legat, J.-D., Verleysen, M., Madrenas, J., & Dominguez, J. (1995). A VLSI system for neural Bayesian and LVQ classification. Lecture Notes in Computer Science, 930, 696-703. https://hdl.handle.net/2078.5/254219 (Original work published 1995)