A real-time VLSI-based architecture for multi-motion estimation

Legat, Jean-Didier;Cornil, J.P.;Macq, D.;Verleysen, Michel
(1992) Proceedings. 11th IAPR International Conference on Pattern Recognition. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition — Location: The Hague, Netherlands (30.August.1992)

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  • Legat, Jean-Didierorcid-logoUCLouvain
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  • Cornil, J.P.
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  • Macq, D.
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  • Verleysen, MichelUCLouvain
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Abstract
This paper describes a new parallel architecture dedicated to multi-motion estimation. The input image is scanned by a standard video camera with 256 grey levels. Motion computing is based on the optical flow determination. Some constraints are proposed to allow multi-motion evaluation. The algorithm is presented and the main features of a 1-D systolic architecture which is based on a custom VLSI chip is given. This architecture allows a real-time implementation of the multi-motion estimation algorithm.
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Legat, J.-D., Cornil, J. P., Macq, D., & Verleysen, M. (1992). A real-time VLSI-based architecture for multi-motion estimation. Proceedings. 11th IAPR International Conference on Pattern Recognition.Vol. IV. Conference D: Architectures for Vision and Pattern Recognition, p. 147-150. https://doi.org/10.1109/ICPR.1992.202152