A new VLSI architecture for large Hopfield's neural networks
(1988) 14th European Solid-State Circuits Conference (ESSCIRC 1988) — Location: Manchester (UK) (21.September.1988)
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- Abstract
- A new CMOS architecture for Hopfield's neural networks is proposed. The use of differential amplifiers and active synapses allows the implementation of hundreds of neurons on a single chip. Since it is fully programmable, the circuit can be used as a content-addressable memory as well as in optimization problems.
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Citations
Verleysen, M., Sirletti, B., & Jespers, P. (1988). A new VLSI architecture for large Hopfield’s neural networks. Proceedings of the 14th European Solid-State Circuits Conference (ESSCIRC 1988), p. 343-346. https://hdl.handle.net/2078.5/254207