An Analog Processor Architecture for a Neural-network Classifier
(1994) IEEE Micro — Vol. 14, n° 3, p. 16-28 (1994)
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- Abstract
- Many neural-like algorithms currently under study support classification tasks. Several of these algorithms base their functionality on LVQ-like procedures to find locations of centroids in the data space, and on kernel (or radial-basis) functions centered on these centroids to approximate functions or probability densities. A generic analog chip could implement in a parallel way all basic functions found in these algorithms, permitting construction of a fast, portable classification system.
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Citations
Verleysen, M., Thissen, P., Voz, JL., & Madrenas, J. (1994). An Analog Processor Architecture for a Neural-network Classifier. IEEE Micro, 14(3), 16-28. https://doi.org/10.1109/40.285221 (Original work published 1994)