Bulk vs SOI CMOS APS optimal design for low power low voltage applicationsAfzalian, Aryan;Delatte, Pierre;Legat, Jean-Didier;Flandre, Denis(2001) ECCTD′01 - European Conference on Circuit Theory and Design — Location: Espoo (Finland) (28.August.2001)
FilesNo attached file found for this publication.DetailsAuthorsAfzalian, AryanUCLouvainAuthorDelatte, PierreUCLouvainAuthorLegat, Jean-DidierUCLouvainAuthorFlandre, DenisUCLouvainAuthorAffiliationsUCLouvainFSA/ELEC - Département d'électricitéShow moreCitations APA Chicago FWB Afzalian, A., Delatte, P., Legat, J.-D., & Flandre, D. (2001). Bulk vs SOI CMOS APS optimal design for low power low voltage applications. Proceeding of ECCTD′01, p. II.53-II.56. https://hdl.handle.net/2078.5/253432