Novel ultra low-power design techniques for analog, digital and memory functions - Implementations in SOI technology

(2008) 7th edition of Faible Tension Faible Consommation (FTFC 2008) — Location: Louvain-la-Neuve (Belgium) (26.May.2008)

Files

No attached file found for this publication.

Details

Authors
Affiliations

Citations

Flandre, D. (2008). Novel ultra low-power design techniques for analog, digital and memory functions - Implementations in SOI technology. 7th edition of Faible Tension Faible Consommation (FTFC 2008), Louvain-la-Neuve (Belgium). https://hdl.handle.net/2078.5/253382