Behaviour of Graded Channel SOI Gate-All-Around NMOSFET Devices at High Temperatures

Davanzzo Gomes dos Santos, Carolina;Pavanello, Marcelo Antonio;Martino, Joao Antonio;Flandre, Denis;Raskin, Jean-Pierre
(2004) 19th International Symposium on Microelectronics Technology and Devices (SBMICRO 2004) — Location: Porto de Galinhas Beach (Brazil)

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  • Davanzzo Gomes dos Santos, CarolinaUniversidade de Sao Paulo
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  • Pavanello, Marcelo AntonioCentro Universitario da FEI
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  • Martino, Joao AntonioCentro Universitario da FEI
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Abstract
This paper presents the behavior of Graded Channel SOI Gate-All-Around (GAA) nMOSFET at high temperatures in the range of 27°C to 300°C. Threshold voltage, subthreshold slope, maximum transconductance, zero temperature coefficient and Early voltage were investigated through three-dimensional simulations and electrical characterization. It was verified that when temperature increases, threshold voltage decreases, subthreshold slope increases and did not suffer any degradation with the LLD/L ratio increase. The maximum transconductance decreases when temperature increases, and increases for larger LLD/L ratios, and Early voltage decreases almost linearly with temperature increase. The results show the excellent behavior of GC SOI GAA nMOSFET at high temperatures compared to conventional SOI GAA devices.
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Davanzzo Gomes dos Santos, C., Pavanello, M. A., Martino, J. A., Flandre, D., & Raskin, J.-P. (2004). Behaviour of Graded Channel SOI Gate-All-Around NMOSFET Devices at High Temperatures. In Santos E.J.P., Ribas R.P., Swart J. Eds. (ed.), Proceedings of the Nineteenth International Symposium on Microelectronics Technology and Devices (SBMICRO 2004) (pp. 9-14). The Electrochemical Society (ECS). https://hdl.handle.net/2078.5/253375