A 25MHz 7μW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes
(2012) International Solid-State Circuits Conference — Location: San Francisco (19.February.2012)
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Details
- Authors
Legat, Jean-Didier 
- Abstract
- A 65nm 25MHz ultra-low-voltage microcontroller SoC is implemented with an embedded all-digital adaptive voltage scaling system, a glitch-masking instruction cache with no miss latency and a robust clock tree for low-voltage timing closure. It achieves 7µW/MHz power consumption in active mode, 1.5µW sleep power and 0.66mm² area to save on carbon footprint of sensor nodes.
- Affiliations
Berkeley P.E. International
Citations
Bol, D., De Vos, J., Hocquet, C., Durvaux, F., Botman, F., Boyd, S., Flandre, D., & Legat, J.-D. (2012). A 25MHz 7μW/MHz Ultra-Low-Voltage Microcontroller SoC in 65nm LP/GP CMOS for Low-Carbon Wireless Sensor Nodes. IEEE International Solid State Circuits Conference. Digest of Technical Papers, 55(1), 490-491. https://doi.org/10.1109/ISSCC.2012.6177104 (Original work published 2012)