Analysis and Minimization of Practical Energy in 45nm Subthreshold Logic Circuits
(2008) IEEE International Conference on Computer Design, ICCD 2008 — Location: Lake Tahoe (California) (12.October.2008)
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- Authors
Legat, Jean-Didier 
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Citations
Bol, D., Ambroise, R., Flandre, D., & Legat, J.-D. (2008). Analysis and Minimization of Practical Energy in 45nm Subthreshold Logic Circuits. Proceedings of the IEEE International Conference on Computer Design, ICCD 2008, 294-300. https://hdl.handle.net/2078.5/253264