OCTO Layout Variations as an Alternative to Mitigate TID Effects

Fino, Leonardo Navarenho de Souza;da Silveira, M.A.G.;Renaux, Christian;Flandre, Denis;Gimenez, Salvador Pinillos
(2015) 10th Workshop on Semiconductors and Micro & Nano Technology (SEMINATEC 2015) — Location: Sao Bernardo do Campo (Brazil) (9.April.2015)

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Authors
  • Fino, Leonardo Navarenho de SouzaDepartment of Electrical Engineering, Centro Universitario da FEI, Brazil
    Author
  • da Silveira, M.A.G.Department of Physics, Centro Universitario da FEI, Brazil
    Author
  • Renaux, ChristianUCLouvain
    Author
  • Flandre, DenisUCLouvain
    Author
  • Gimenez, Salvador PinillosDepartment of Electrical Engineering, Centro Universitario da FEI, Brazil
    Author
Abstract
This paper performs an experimental comparative study between the OCTO SOI MOSFET (octagonal gate geometry) and its derivations (different angles) as a total ionizing dose (TID) effects mitigation strategy. After a TID equal a 600 krad were analyzed the leakage current (ILEAK) behaviour in order to indicate the better configuration for digital applications in radioactive environment. The α angle equal to 53.1° achieved promising resultsfor low power and low voltage applications due ILEAK reduction in function of the TID.
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Fino, L. N. d. S., da Silveira, M. A. G., Renaux, C., Flandre, D., & Gimenez, S. P. (2015). OCTO Layout Variations as an Alternative to Mitigate TID Effects. 10th Workshop on Semiconductors and Micro & Nano Technology (SEMINATEC 2015), Sao Bernardo do Campo (Brazil). https://hdl.handle.net/2078.5/253215