Investigation of charge control related performances in double-gate SOI MOSFETs

Kilchytska, Valeriya;Chung, Tsung Ming;van Meer, H.;De Meyer, K.;Flandre, Denis;et.al.
(2003) 11th International Symposium Silicon-on-Insulator Technology and Devices — Location: Paris (France) (May.2003)

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Abstract
In this work we have shown the benefits of (even sub-0.1 μm) double-gate SOI MOSFETs for digital and analog performances. We verified applicability of the quasi double-gate technique with regard to actual double-gate devices and demonstrated that it is valid in strong inversion regime only. Using this technique instead of real double-gate in the weak inversion regime gives a large error and is not acceptable.
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Kilchytska, V., Chung, T. M., van Meer, H., De Meyer, K., Raskin, J.-P., & Flandre, D. (2003). Investigation of charge control related performances in double-gate SOI MOSFETs. Proceedings of the 11th International Symposium Silicon-on-Insulator Technology and Devices, 225-230. https://hdl.handle.net/2078.5/253202