Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers
(2011) I E E E Journal on Emerging and Selected Topics in Circuits and Systems — Vol. 1, n° 2, p. 141-149 (2011)
Files
No attached file found for this publication.
Details
- Authors
- Abstract
- This paper presents a specific, fully-automated and portable design methodology used to optimize implementations of AC–DC rectifiers using MOS diodes. Output voltage and efficiency are theoretically analyzed taking into account influences of devices DC and AC characteristics, input signal voltages and frequencies as well as load currents, temperatures, backgate voltages and even capacitors and diodes parasitic capacitances. An experimental voltage multiplier is designed in a 1 $mu$ m multiple-threshold voltage SOI CMOS technology for ultra low power applications at 13.56 MHz.
- Affiliations
Citations
Gosset, G., & Flandre, D. (2011). Fully-Automated and Portable Design Methodology for Optimal Sizing of Energy-Efficient CMOS Voltage Rectifiers. I E E E Journal on Emerging and Selected Topics in Circuits and Systems, 1(2), 141-149. https://doi.org/10.1109/JETCAS.2011.2158357 (Original work published 2011)