Effect of High Temperature on Analog Parameters of Asymmetric Self-Cascode SOI nMOSFETs

d'Oliveira, Ligia M.;Flandre, Denis;Pavanello, Marcelo Antonio;de Souza, Michelly
(2014) 29th Symposium on Microelectronics Technology and Devices (SBMicro 2014) — Location: Aracaju (Brazil) (1.September.2014)

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Authors
  • d'Oliveira, Ligia M.Centro Universitario da FEI, Brazil
    Author
  • Flandre, DenisUCLouvain
    Author
  • Pavanello, Marcelo AntonioCentro Universitario da FEI, Brazil
    Author
  • de Souza, MichellyCentro Universitario da FEI, Brazil
    Author
Abstract
This paper presents an analysis on the high temperature operation of Silicon-on-Insulator (SOl) nMOSFETs in Asymmetric Self-Cascode (A-SC) configuration. For this analysis, experimental results in the range of 300K to 500K of ASC structures with different channel lengths for both the drain side transistor (MD) and source side transistor (MS) are used. The effect of varying channel length under high temperatures on the A-SC association is evaluated using as figure of merit important analog parameters, such as the intrinsic voltage gain and transconductance over drain current ratio.
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d’Oliveira, L. M., Flandre, D., Pavanello, M. A., & de Souza, M. (2014). Effect of High Temperature on Analog Parameters of Asymmetric Self-Cascode SOI nMOSFETs. 29th Symposium on Microelectronics Technology and Devices (SBMicro 2014), Aracaju (Brazil). https://hdl.handle.net/2078.5/253128