Threshold Voltage Extraction Techniques and Temperature Effect in Context of Global Variability in UTBB MOSFETs
(2013) 43rd European Solid-State Device Research Conference (ESSDERC 2013) — Location: Bucharest (Roumania) (16.September.2013)
Files
ThresholdVoltageExtractionTechniquesandTemperatureandtemperatureEffectinContextofGlobalVariabilityinUTBBMOSFETs.pdf
Restricted Access - Adobe PDF
- 370.92 KB
Details
- Authors
- Abstract
- Assessment of global threshold voltage (Vth) variability in advanced silicon-on-insulator devices implies careful selection of a Vth extraction technique as different methods are sensitive to different parameters and effects. Our main focus is on experimental assessment of most widely used techniques, such as constant current, transconductance derivative and recently introduced gm/Id techniques. Some comparison with linear extrapolation methods is also provided. It is shown that gm/Id method, using data near threshold, is less sensitive to cross-impact of short channel effects (i.e. subthreshold slope and drain induced barrier lowering) variability. Therefore this method is preferred for extraction of intrinsic Vth variability without parasitic effects. Temperature evolution of global inter-die parameter variability is assessed for the first time. Possible reasons of slight variability temperature dependence are discussed.
- Affiliations
Citations
Makovejev, S., Kazemi Esfeh, B., Andrieu, F., Raskin, J.-P., Flandre, D., & Kilchytska, V. (2013). Threshold Voltage Extraction Techniques and Temperature Effect in Context of Global Variability in UTBB MOSFETs. Proceedings of the 43rd European Solid-State Device Research Conference (ESSDERC 2013), 4. https://doi.org/10.1109/ESSDERC.2013.6818852