Fully-depleted SOI CMOS circuits for operation above 250°C
(1999) 1999 NASA/JPL conference on Electronics for Extreme Environments — Location: Pasadena (USA) (9.February.1999)
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Flandre, D., Dessard, V., Demeûs, L., Viviani, A., & Colinge, J.-P. (1999). Fully-depleted SOI CMOS circuits for operation above 250°C. Proceedings of the 1999 NASA/JPL conference on Electronics for Extreme Environments. 1999 NASA/JPL conference on Electronics for Extreme Environments, Pasadena (USA). https://hdl.handle.net/2078.5/253096