Characterization and modelling of single event transients in LDMOS-SOI FETs

Alvarado, Jose Joaquin;Kilchytska, Valeriya;Boufouss, El Hafed;Flandre, Denis
(2011) Microelectronics Reliability — Vol. 51, n° 9-11, p. 2004-2009 (2011)

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Abstract
In this paper, we develop a model to simulate the single event transient (SET) phenomena in LDMOS-SOI devices. 3D simulations and compact model are coupled in order to reproduce the current pulse in LDMOS-SOI device generated by an ion strike through the different device locations, at various biases and temperatures. Obtained results allow for identifying the effects to be taken into account for accurate transient description. Furthermore, comparison with SET observed in Partially Depleted SOI MOSFET reveals that LDMOS device exhibits lower drain current upset whereas larger recovery time, which results in higher collected charge.
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Alvarado, J. J., Kilchytska, V., Boufouss, E. H., & Flandre, D. (2011). Characterization and modelling of single event transients in LDMOS-SOI FETs. Microelectronics Reliability, 51(9-11), 2004-2009. https://doi.org/10.1016/j.microrel.2011.07.082 (Original work published 2011)