Sub-45nm Fully-Depleted SOI CMOS Subthreshold Logic for Ultra-Low-Power Applications
(2008) IEEE International SOI Conference 2008 — Location: New Paltz (New-York) (5.October.2008)
Files
No attached file found for this publication.
Details
- Authors
Legat, Jean-Didier 
- Affiliations
Citations
Bol, D., Ambroise, R., Flandre, D., & Legat, J.-D. (2008). Sub-45nm Fully-Depleted SOI CMOS Subthreshold Logic for Ultra-Low-Power Applications. Proceeding of the IEEE International SOI Conference 2008, p. 57 - 58. https://hdl.handle.net/2078.5/253047