Design techniques for reliable timing closure in ULV SoCsBol, David;Hocquet, Cédric;De Vos, Julien;Durvaux, François;Legat, Jean-Didier;et.al.(2011) 2011 Subthreshold Microelectronics Conference — Location: Lexington (MA) (26.September.2011)
FilesBol-TimingClosure.pdf Restricted Access Adobe PDF131.24 KBRequest a copyDetailsAuthorsBol, DavidUCLouvainAuthorHocquet, CédricUCLouvainAuthorDe Vos, JulienUCLouvainAuthorDurvaux, FrançoisUCLouvainAuthorBotman, FrançoisUCLouvainAuthorFlandre, DenisUCLouvainAuthorLegat, Jean-DidierUCLouvainAuthorShow more AffiliationsUCLouvainSST/ICTM/ELEN - Pôle en ingénierie électriqueShow moreCitations APA Chicago FWB Bol, D., Hocquet, C., De Vos, J., Durvaux, F., Botman, F., Flandre, D., & Legat, J.-D. (2011). Design techniques for reliable timing closure in ULV SoCs. 2011 Subthreshold Microelectronics Conference, Lexington (MA). https://hdl.handle.net/2078.5/253017