Charge injection characterization of thin-film SOI MOS transistors at high temperature
(2001) Silicon-On-Insulator Technology and Devices X. Proceedings of the Tenth International Symposium — Location: Washington, DC (USA) (25.March.2001)
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- Abstract
- Theoretical and experimental results from the characterization of the charge injection phenomenon show that the evolution with temperature of the charge-injection-induced error voltage over a switched capacitor, as a function of the fall rate of the switching-off signal, for thin-film, fully depleted SOI MOS transistors, presents similar behaviors for temperatures between 27 degrees C and 300 degrees C. Results from computations based on a strong inversion model and semiconductor level 2-D simulations were confirmed by measurements. A fully on-chip system to characterize charge injection at high temperature was designed. The output buffer used to isolate the transistor to characterize from the external instruments was designed based on the g/sub m//I/sub D / methodology. All buffer's transistors but one were biased at their zero-temperature-coefficient (ZTC) point.
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Picun, G., Demeus, L., & Flandre, D. (2001). Charge injection characterization of thin-film SOI MOS transistors at high temperature. In Cristoloveanu, S.; Hemment, P.L.F.; Izumi, K.T.; Celler, G.K.; Assaderaghi, F.; Kim, Y-W; (ed.), Silicon-on-Insulator Technology and Devices X. Proceedings of the TenthInternational Symposium (Electrochemical Society Proceedings Vol.2001-3) (pp. 115-120). Electrochem. soc. https://hdl.handle.net/2078.5/253016