A robust 10 Gbps duobinary transceiver in 0.13 μm SOI CMOS for short-haul optical networks

Aguirre, Javier;Bol, David;Flandre, Denis;Sanchez-Azqueta, Carlos;Celma, Santiago
(2017) IEEE Transactions on Industrial Electronics — Vol. 99, p. 1 (2017)

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  • Aguirre, JavierUniversity of Zaragoza, Zaragoza/Spain
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  • Bol, Davidorcid-logoUCLouvain
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  • Author
  • Sanchez-Azqueta, CarlosUniversity of Zaragoza, Zaragoza/Spain
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  • Celma, SantiagoUniversity of Zaragoza, Zaragoza/Spain
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Abstract
Duobinary modulation is a robust and attractive coding format for high-speed serial data transmission because it allows an excellent trade-off between speed, noise and power. However, conventional architectures reported in the literature performing the necessary precodification in a duobinary transceiver suffer from a severe vulnerability to glitches that limits their performances at high data rates. This work presents a new precoder scheme that overcomes this limitation with a very small design, area and power consumption, and a time-domain analysis that confirms the advantages of the proposed solution. The proposed precoder has been implemented in a full duobinary transceiver fabricated in a 0.13-μm PD-SOI CMOS technology that works at 10 Gbps. The fabricated precoder consumes 13.8 mW and the decoder, 23.2 mW from a single supply of 1.2 V. Experimental results are provided for a simulated channel of 50-m plastic optical fiber.
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Aguirre, J., Bol, D., Flandre, D., Sanchez-Azqueta, C., & Celma, S. (2017). A robust 10 Gbps duobinary transceiver in 0.13 μm SOI CMOS for short-haul optical networks. IEEE Transactions on Industrial Electronics, 99, 1. https://doi.org/10.1109/TIE.2017.2716870 (Original work published 2017)