Low temperature operation of graded-channel SOI nMOSFETs for analog applications

Pavanello, Marcelo Antonio;Der Agopian, P.G.;Martino, Joao Antonio;Flandre, Denis
(2002) 5th European Workshop on Low Temperature Electronics (WOLTE 2002) — Location: Grenoble (France) (19.June.2002)

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  • Pavanello, Marcelo AntonioCentro Universitario da FEI
    Author
  • Der Agopian, P.G.
    Author
  • Martino, Joao AntonioCentro Universitario da FEI
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  • Author
Abstract
We present in this work is an analysis of the low temperature operation of Graded-Channel fully-depleted Silicon-On-Insulator (SOI) nMOSFETs for analog applications. This analysis is supported by a comparison between the results obtained by MEDICI numerical bidimensional simulations and measurements. The Graded-Channel transistor presents higher Early voltage and transconductance at 100 K if compared to the conventional fullydepleted SOI nMOSFET.
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Pavanello, M. A., Der Agopian, P. G., Martino, J. A., & Flandre, D. (2002). Low temperature operation of graded-channel SOI nMOSFETs for analog applications. Proceedings of the 5th European Workshop on Low Temperature Electronics (WOLTE 2002), 23-26. https://doi.org/10.1109/WOLTE.2002.1022444