Improvement of sub-0.25 mu m fully-depleted SOI CMOS analog performance by thinning the Si film

Neve, A.;Dessard, V.;Delatte, Pierre;Brodeoux, V.;Flandre, Denis;et.al.
(2001) Silicon-On-Insulator Technology and Devices X. Proceedings of the Tenth International Symposium — Location: Washington, DC (USA) (25.March.2001)

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  • Neve, A.
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  • Dessard, V.
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  • Delatte, PierreUCLouvain
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  • Brodeoux, V.
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Abstract
The present work demonstrates that deep-submicron FD MOSFETs exhibit outstanding properties for analog applications, well superior to comparable PD or bulk Si devices, in terms of gain, frequency, noise, swing... performance, provided that full depletion is ensured in all modes of operation by correct process optimization.
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Neve, A., Dessard, V., Delatte, P., Brodeoux, V., Iniguez, B., Rauly, E., & Flandre, D. (2001). Improvement of sub-0.25 mu m fully-depleted SOI CMOS analog performance by thinning the Si film. In Cristoloveanu, S.; Hemment, P.L.F.; Izumi, K.T.; Celler, G.K.; Assaderaghi, F.; Kim, Y-W; (ed.), Silicon-on-Insulator Technology and Devices X. Proceedings of the TenthInternational Symposium (Electrochemical Society Proceedings Vol.2001-3) (pp. 271-276). Electrochem. soc. https://hdl.handle.net/2078.5/252948