In this paper, for the first time, we apply the ultra-low-power (ULP) diode concept with Schottky Barrier (SB) transistors and analyze their performance in comparison to standard CMOS, using calibrated TCAD mixed-mode simulations. The negative impedance characteristics obtained in reverse mode with SB devices are shown to offer more stable current characteristics compared to CMOS, especially as a function of temperature. The origin of this behavior manifests itself in the fact that carriers tunneling through the barrier by field emission and carriers overcoming the barrier by thermionic emission both contribute to the total device current. This enables superior current performance over temperature. This enables ultra-low-power memory application over a larger temperature range, or with a denser cell area.
Schwarz, M., Kloes, A., & Flandre, D. (2021). Temperature-dependent performance of Schottky-Barrier FET ultra-low-power diode. Solid-State Electronics, 184(108124), 8. https://doi.org/10.1016/j.sse.2021.108124 (Original work published 2021)