Top-down design of an UHF (433 MHz) fully integrated low-voltage, low-power SOI/CMOS voltage controlled oscillator
(2001) 9th URSI Forum — Location: Louvain-la-Neuve (Belgium) (13.December.2001)
Files
No attached file found for this publication.
Details
- Authors
- Abstract
- This work deals with the design of a voltage controlled oscillator designed to be part of a Phase Locked-Loop (PLL), which implements the frequency synthesizer of a Low-IF receiver. The receiver operates in the European 433-MHz ISM band. We focus on low-cost, low-voltage (1 … 1.5V) battery operated systems to be used in portable applications (medical care, surveillance systems, …). Therefore we want the analog cells to be fully integrated in a single chip solution. For such specifications, the use of fully depleted Silicon-on-Insulator (SOI) technology yields better results than conventional Bulk technologies. In the design of the VCO we developed a Top-Down strategy, starting from high-level specifications such as consumption, operating frequency and phase noise, and subsequently deriving transistor sizes and bias.
- Affiliations
Citations
Levacq, D., Vancaillie, L., & Flandre, D. (2001). Top-down design of an UHF (433 MHz) fully integrated low-voltage, low-power SOI/CMOS voltage controlled oscillator. Proceedings of the 9th URSI Forum, 39. https://hdl.handle.net/2078.5/252769