Comparison of SOI, poly-Si TFT and bulk Si MOS performance using gm/ID methodology
(2003) 11th International Symposium «Silicon-on-Insulator Technology and Devices” — Location: Paris (France) (27.April.2003)
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- Abstract
- The poly-Si TFT is a member of the SOI family which recently achieves higher levels of performance and integration onto glass substrate. However, in the TFT analogue circuit fields, a systematic design methodology is still lacking. Standard SOI or bulk Si analog design techniques can not be directly extended to TFT because of the unique I-V characteristics caused by trap effects in TFT. In this work we modified the gm/Id analog design methodology to extend it to TFT technology. The comparison of analog performance of various technologies, i.e. bulk silicon, SOI and TFT, has been made through the common-source amplifier case.
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Takatori, K., & Flandre, D. (2003). Comparison of SOI, poly-Si TFT and bulk Si MOS performance using gm/ID methodology. In S.Cristoloveanu (ed.), Proceedings of the 11th International Symposium «Silicon-on-Insulator Technology and Devices” (pp. 301-306). https://hdl.handle.net/2078.5/252767