MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design
(2003) 29th European Solid-State Circuits Conference (ESSCIRC 2003) — Location: Estoril (Portugal) (16.September.2003)
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- Abstract
- Based on mismatch measurements performed on very different CMOS technologies and large operating temperature range, we propose to model more adequately the mismatch in weak and moderate inversion by adding a new term related to the mismatch of the body effect factor dependence on the gate voltage. The model is introduced in a top-down analog design methodology, applied to the current mirror case, revealing some nonobvious design rules as well as typical misconceptions.
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Vancaillie, L., Silveira, F., Linares-Barranco, B., Serrano-Gotarredona, T., & Flandre, D. (2003). MOSFET mismatch in weak/moderate inversion: model needs and implications for analog design. Proceedings of the 29th European Solid-State Circuits Conference (ESSCIRC 2003), 671-674. https://doi.org/10.1109/ESSCIRC.2003.1257224