On-Resitance and Harmonic Distorsion in Graded-Channel SOI FD MOSFET
(2004) Fifth International Caracas Conference on Devices, Circuits and Systems — Location: Dominican Republic (3.November.2004)
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- Abstract
- In this paper we analyze the advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time-tunable filters. The study of the two major figures of merit in such applications, i.e. on-resistance and non-linear harmonic distortion, is supported by measurements on conventional and graded-channel (GC) fully depleted (FD) SOI MOSFETs. The quasi linear I-V characteristics of GC transistors demonstrate a decrease of the on-resistance as the length of the low doped region into the channel is augmented and an improvement of the third order harmonic distortion (HD3), when compared with conventional transistors. A full comparison method between conventional and GC SOI MOSFETs is presented considering HD3 evolution with on-resistance tuning under low voltage of operation, demonstrating the significant advantages of the asymmetrical long channel transistors.
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Cerdeira, A., Aleman, M. A., Pavanello, M. A., Martino, J. A., Vancaillie, L., & Flandre, D. (2004). On-Resitance and Harmonic Distorsion in Graded-Channel SOI FD MOSFET. Proceedings of the Fifth International Caracas Conference on Devices, Circuits and Systems, 118-121. https://doi.org/10.1109/ICCDCS.2004.1393365