On the Potential 0.2 µm Fully-Depleted SOI for Low-power Mixed and Digital Circuits for Applications up to 225°C

Delatte, Pierre;Picun, Gonzalo;Demeûs, Laurent;Vancaillie, Laurent;Ichikawa, F.;et.al.
(2003) 2003 International Conference on High Temperature Electronics (HITEN 2003) — Location: Oxford (United Kingdom) (8.July.2003)

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  • Delatte, PierreUCLouvain
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  • Picun, GonzaloUCLouvain
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  • Demeûs, LaurentUCLouvain
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  • Vancaillie, LaurentUCLouvain
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  • Ichikawa, F.
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Delatte, P., Picun, G., Demeûs, L., Vancaillie, L., Kilchytska, V., Flandre, D., Kawai, Y., & Ichikawa, F. (2003). On the Potential 0.2 µm Fully-Depleted SOI for Low-power Mixed and Digital Circuits for Applications up to 225°C. In Johnston C., Vermessan O., Crossley A. (ed.), Proceedings of the 2003 International Conference on High Temperature Electronics (HITEN 2003) (pp. 105-110). https://hdl.handle.net/2078.5/252612