Diamond layout style impact on SOI MOSFET in high temperature environment

Gimenez, Salvador Pinillos;Galembeck, Egon Henrique Salerno;Renaux, Christian;Flandre, Denis
(2015) Microelectronics Reliability — Vol. MR_11492, p. 6 (2015)

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Authors
  • Gimenez, Salvador PinillosFEI University Center, Sao Bernardo do Campo, Brazil
    Author
  • Galembeck, Egon Henrique SalernoFEI University Center, Sao Bernardo do Campo, Brazil
    Author
  • Renaux, ChristianUCLouvain
    Author
  • Flandre, DenisUCLouvain
    Author
Abstract
This work performs an experimental comparative study between the Diamond (hexagonal gate geometry) and Standard layouts styles for Metal–Oxide–Semiconductor Field Effect Transistor in high temperatures environment. The devices were manufactured with the 1 lm Silicon-on-Insulator CMOS technology. The results demonstrate that the Diamond SOI MOSFET is capable to keep active the Longitudinal Corner Effect and the Parallel Association of MOSFET with Different Channel Lengths Effect in high temperature conditions and consequently to continue presenting a better electrical performance than the one found in the conventional SOI MOSFET.
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Gimenez, S. P., Galembeck, E. H. S., Renaux, C., & Flandre, D. (2015). Diamond layout style impact on SOI MOSFET in high temperature environment. Microelectronics Reliability, MR_11492, 6. https://doi.org/10.1016/j.microrel.2015.02.015 (Original work published 2015)