A study of the quantization noise in FFT (fast Fourier transform) processors is undertaken with the purpose of comparing several possible Si implementations. Simulations are presented to validate theoretical results and to derive corrected formulas, that predict simulation results within 0.5 dB. Finally, a comparative study shows that application-specific integrated circuits using fixed-point arithmetic with truncation represent the best compromise for real-time integrated FFTs.
Flandre, D., Debleser, M., Vandemeulebroecke, A., & Jespers, P. G. A. (1988). Comparison of equivalent precision dedicated FFT processors. Proceedings of the 1988 IEEE International Symposium on Circuits and Systems (ISCAS 1988)(Cat. No.88CH2458-8), Vol. 2, p. 1919-1922. https://doi.org/10.1109/ISCAS.1988.15313