High-temperature gate capacitances of thin-film SOI MOSFETs
(1993) 23rd European Solid State Device Research Conference, 1993 (ESSDERC ’93) — Location: Grenoble (France) (13.September.1993)
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- Abstract
- This paper presents original measurements and two-dimensional simulations of high-temperature SOI MOSFET intrinsic gate capacitances. Results regarding threshold voltage extraction, impact ionization effects and subthreshold capacitance are discussed.
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Gentinne, B., Flandre, D., Colinge, J.-P., & Van de Wiele, F. (1993). High-temperature gate capacitances of thin-film SOI MOSFETs. Proceedings of the 23rd European Solid State Device Research Conference, 1993 (ESSDERC ’93), 687-690. https://hdl.handle.net/2078.5/225864