Design methodology for CMOS gain-boosted folded-cascode OTA with application to SOI technology
(1996) ESSCIRC′96 — Location: Neuchatel (Suisse) (17.September.1996)
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- Authors
- Abstract
- Equations, criteria and procedures are presented for the design of gain-boosted folded-cascode CMOS OTAs and applied to bulk and SOI implementations and comparisons.
- Affiliations
Citations
Flandre, D., Viviani, A., Eggermont, J.-P., Gentinne, B., & Jespers, P. (1996). Design methodology for CMOS gain-boosted folded-cascode OTA with application to SOI technology. Proceedings of ESSCIRC′96, 320-323. https://hdl.handle.net/2078.5/222418