Potential of SOI for analog and mixed analog-digital low-power applications
(1995) IEEE International Solid-State Circuits Conference — Location: San Francisco (USA) (15.February.1995)
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- Abstract
- SOI technology offers significant assets for low-voltage, low-power high-speed logic. The steeper subthreshold slope of SOI MOSFETs not only improves design of low-voltage logic circuits, but also offers also opportunities for low-power analog design. Identical DC gains can be achieved in SOI and bulk either with less current or smaller geometries, or both. This is illustrated by plots of total area and stand-by current versus DC open-loop gain of two identical Miller op amps, one bulk and one SOI
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Citations
Colinge, J.-P., Eggermont, J.-P., Flandre, D., Francis, P., & Jespers, P. (1995). Potential of SOI for analog and mixed analog-digital low-power applications. Proceedings of the IEEE International Solid-State Circuits Conference, 194-195. https://doi.org/10.1109/ISSCC.1995.535519