Channel Width Influence on the Analog Performance of the Asymmetric Self-Cascode FD SOI nMOSFETs
(2017) 32nd Symposium on Microelectronics Technology and Devices (SBMicro 2017) — Location: Fortaleza (Brazil) (28.August.2017)
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ChannelWidthInfluenceontheAnalogPerformanceoftheAsymmetricSelf-CascodeFDSOInMOSFETs.pdf
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- Abstract
- In this paper, the analog performance of the Asymmetric Self-Cascode structure of Fully Depleted SOI nMOSFETs has been evaluated with regards to the variation of channel width, through three-dimensional numerical simulations. The largest gain has been obtained using the narrowest transistor near the source and the widest transistor near the drain.
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Citations
Assalti, R., de Souza, M., & Flandre, D. (2017). Channel Width Influence on the Analog Performance of the Asymmetric Self-Cascode FD SOI nMOSFETs. Proceedings of the 32nd Symposium on Microelectronics Technology and Devices (SBMicro 2017). Published. 32nd Symposium on Microelectronics Technology and Devices (SBMicro 2017), Fortaleza (Brazil). https://hdl.handle.net/2078.5/221220