Analysis on the improved analog performance on double gate transistors by using the graded-channel architecture in a wide temperature rangePavanello, M.A.;Martino, J.A.;Raskin, Jean-Pierre;Flandre, Denis(2005) Solid-State Electronics, Elsevier Science, Pergamon — Vol. 49, n° 10, p. 1569-1575 (October) (2005)
FilesNo attached file found for this publication.DetailsAuthorsPavanello, M.A.AuthorMartino, J.A.AuthorRaskin, Jean-PierreUCLouvainAuthorFlandre, DenisUCLouvainAuthorAffiliationsUCLouvainFSA/ELEC - Département d'électricitéShow moreCitations