Analysis on the improved analog performance on double gate transistors by using the graded-channel architecture in a wide temperature range

Pavanello, M.A.;Martino, J.A.;Raskin, Jean-Pierre;Flandre, Denis
(2005) Solid-State Electronics, Elsevier Science, Pergamon — Vol. 49, n° 10, p. 1569-1575 (October) (2005)

Files

No attached file found for this publication.

Details

Authors
Affiliations

Citations