Substrate crosstalk reduction using SOI technology
(1997) IEEE Transactions on Electron Devices — Vol. 44, n° 12, p. 2252-2261 (1997)
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- Abstract
- This work analyzes both by simulations and measurements the substrate crosstalk performances of various Silicon-On-Insulator (SOT) technologies, and compare them to those of normal Bulk CMOS process, The influence of various parameters, such as substrate resistivity, buried oxide thickness and distance between devices, is investigated. The use of capacitive guard rings is proposed, and their effectiveness is demonstrated, A simple RC model has been developed to allow a deep understanding of these phenomena as well as to simplify future studies of more complex systems, The superiority of high-resistivity SIMOX substrates over standard SOI and hulk is finally demonstrated.
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Raskin, J.-P., Viviani, A., Flandre, D., & Colinge, J.-P. (1997). Substrate crosstalk reduction using SOI technology. IEEE Transactions on Electron Devices, 44(12), 2252-2261. https://doi.org/10.1109/16.644646 (Original work published 1997)