Asymmetric Self-Cascode Current-Voltage Constructing Algorithm for Analog Figures-of-Merit Extraction

Martins d'Oliveira, Ligia;de Souza, Michelly;Kilchytska, Valeriya;Flandre, Denis
(2018) 2018 33rd Symposium on Microelectronics Technology and devices (SBMicro 2018) — Location: Bento Gonçalves, Rio Grande do Sul (Brazil ) (27.August.2018)

Files

AsymmetricSelf-CascodeCurrent-VoltageConstructingAlgirithmforAnalogFiguresofMeritextraction.pdf
  • Open Access
  • Adobe PDF
  • 1.09 MB
Download

Details

Authors
  • Martins d'Oliveira, LigiaElectrical Engineering Department, Centro Universitário FEI, São Bernardo do Campo, Brazil
    Author
  • de Souza, MichellyElectrical Engineering Department, Centro Universitário FEI, São Bernardo do Campo, Brazil
    Author
  • Kilchytska, ValeriyaUCLouvain
    Author
  • Flandre, DenisUCLouvain
    Author
Abstract
This paper proposes an analysis of a self-cascode IV constructing algorithm for the extraction of DC analog figures of merit, namely the transconductance, output conductance and intrinsic voltage gain. The algorithm was applied on input tables of measured single Fully-depleted Silicon on Insulator (FDSOI) nMOSFETs and was validated on the measured self-cascode association of these devices. The results show an appropriate accuracy, that reflect trends and values with low error.
Affiliations

Citations

  • APA
  • Chicago
  • FWB

Martins d’Oliveira, L., de Souza, M., Kilchytska, V., & Flandre, D. (2018). Asymmetric Self-Cascode Current-Voltage Constructing Algorithm for Analog Figures-of-Merit Extraction. proceedings of SBMicro 2018. Published. 2018 33rd Symposium on Microelectronics Technology and devices (SBMicro 2018), Bento Gonçalves, Rio Grande do Sul (Brazil ). https://hdl.handle.net/2078.5/173596 (Original work published 2018)