Part 1: Design of low-voltage low-power CMOS analog building blocks and OTAs using EKV modelling and gm/ID methodology in bulk and SOI technologies

Flandre, Denis
(2000) Low power techniques and neural applications in microelectronics — ISBN: [84-922529-6-0], p. 3-99, published

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Flandre, D. (2000). Part 1: Design of low-voltage low-power CMOS analog building blocks and OTAs using EKV modelling and gm/ID methodology in bulk and SOI technologies. In Low power techniques and neural applications in microelectronics (p. p. 3-99). Ed. by J. Oliver. https://hdl.handle.net/2078.5/157736